This invention relates to the field of radio frequency (RF) plasma reactors used in processing integrated circuits, and specifically to improvements of the shielding of the reactor chamber for decreasing the defect density of processed wafers and eliminating the need for frequent cleaning of the reactor chamber.
Semiconductor microchips and integrated circuits have become a necessity in today""s technological society. As the technology advances, the demand for smaller, more reliable, and efficiently manufactured integrated circuits increases. Currently, several processes are available to manufacture integrated circuits, including metal etching, chemical vapor deposition (CVD), and physical vapor deposition (PVD), as some examples. RF plasma reactors, for instance, are presently employed in such processes. An example of such a reactor is the Novellus A2 Etch Module manufactured and sold by Novellus Systems, Inc. of San Jose, Calif.
Generally, an RF plasma reactor consists of a reactor chamber, which includes a plasma confinement shield and an anode shield to concentrate the plasma on the wafer. The shielding is provided with cylindrically-shaped apertures having sharp edges through which a gas is directed into the space within the shields for ionization. The reactor chamber also includes an RF power source for igniting and sustaining the plasma and a cryo-pump for creating a vacuum and for maintaining a constant negative pressure and flow of gas within the chamber. Depending upon the particular application, the plasma may be used, for example, in a PVD process to deposit conductive material on the wafer or to plasma etch or clean the wafer.
One such example of plasma etching is the removal of a native oxide layer naturally found on the surface of the wafer. Generally, plasma etching is performed prior to the PVD process, because removal of the oxide layer creates improved chemical and mechanical bonding of the conductive material to the wafer surface. During the etch process, ionized gas particles are accelerated towards the wafer, impacting and dislodging the oxide particles from the wafer surface. These dislodged oxide particles are attracted by and adhere to the plasma confinement and anode shields. As oxide particles accumulate a film is created.
High stress areas develop in the oxide film around the sharp edges of the shield apertures. These high stress areas can cause the oxide film to peel off causing an increased particle count in the space within the shields. Since these particles can rain down on the wafers during subsequent processing of the wafers, the defect density is increased. This may result in circuit malfunction, unreliability, and the like. Thus, the shielding must be cleaned frequently, thereby slowing the manufacturing process and increasing the cost of the end product. In addition, the cylindrical shape of the holes tends to produce a directional gas flow in the space within the shields, which decreases the efficiency of gas ionization. Poor gas ionization produces lower etch rates which further slows the manufacturing process of integrated circuits.
The present invention is directed at overcoming shortcomings in the prior art. The invention comprises a plasma confinement shield and a disk-shaped anode shield having a plurality of apertures having smooth dressed edges for eliminating potential high stress areas and improving gas flow within the reactor chamber. A xe2x80x9cdressed edgexe2x80x9d, as that term is used herein, is a substantially smooth edge which does not consist of a right angular mating of straight surfaces, so as to avoid the sharp edges that cause the high stress locations on the oxide film, such as an edge that is preferably rounded, curved, or beveled. The invention also comprises a method of cleaning the shielding with a carbon dioxide blast for decreasing the particle density encountered within the reactor chamber during processing.
Prior to deployment in the reactor, the shielding of the present invention is blasted with pressurized carbon dioxide which mechanically cleans the shielding. The cleaning process ensures that any particles present on the shield surface are removed prior to processing. During the etching process, the dressed edges of the apertures reduce or eliminate the potential for locations of high stress on the oxide film. This decreases the likelihood that film will peel off, rain down on the wafer, and cause defects, thus increasing the reliability of the integrated circuit manufacturing process is increased.
In addition, the dressed edge of the apertures causes the injected gas to enter the space within the shields in a more widely dispersed pattern than that obtained through a prior art cylindrical aperture without a dressed edge. This leads to more widely dispersed gas flow in the space within the shields, which increases gas ionization. Increased gas ionization generates higher etch rates and further improves manufacturing efficiency.
Other objects and features of the present invention will become apparent from the following detailed description, considered in conjunction with the accompanying drawing figures. It is to be understood, however, that the drawings, which are not to scale, are designed solely for the purpose of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims.